Washington
Making chips one atom at a time
As logic chips scale down to the 22nm node and beyond, the heart of the transistor gate structure, its dielectric film stack, is becoming so thin that it must be atomically engineered.
To meet this challenge, Applied Materials, Inc. has created advanced atomic layer deposition (ALD) technology, which builds ultra-thin, hafnium-based layers less than 2nm in thickness, a fraction of a monolayer at a time, with unmatched uniformity across the wafer.
“Tomorrow’s nanoscale transistors require incredible precision because films just a few atoms thick will determine device performance,” said Steve Ghanayem, group vice president and general manager of the Metal Deposition, Front End and ALD Products division at Applied Materials.
At Semicon West in San Francisco, Applied Materials showcased this technology in its Applied Centura Integrated Gate Stack system for creating the critical gate dielectric structures in 22nm logic chips.
Source: http://goo.gl/Jr9lm
As logic chips scale down to the 22nm node and beyond, the heart of the transistor gate structure, its dielectric film stack, is becoming so thin that it must be atomically engineered.
To meet this challenge, Applied Materials, Inc. has created advanced atomic layer deposition (ALD) technology, which builds ultra-thin, hafnium-based layers less than 2nm in thickness, a fraction of a monolayer at a time, with unmatched uniformity across the wafer.
“Tomorrow’s nanoscale transistors require incredible precision because films just a few atoms thick will determine device performance,” said Steve Ghanayem, group vice president and general manager of the Metal Deposition, Front End and ALD Products division at Applied Materials.
At Semicon West in San Francisco, Applied Materials showcased this technology in its Applied Centura Integrated Gate Stack system for creating the critical gate dielectric structures in 22nm logic chips.
Source: http://goo.gl/Jr9lm
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